( en | de | ru )

 

Disambiguation of "López-Martín, Antonio J."

Author of the publication

copydeleteadd this publication to your clipboard
Highly linear programmable balanced current scaling technique in moderate inversion.

, , , and . IEEE Trans. Circuits Syst. II Express Briefs, 53-II (4): 283-285 (2006)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

José Antonio López

Antonio López-Méndez

Martín Aguilera López

Juan Antonio Cuéllar López

Marta Martín López

 

Other publications of authors with the same name

A proposal for high-performance CCII-based analogue CMOS design., , and . I. J. Circuit Theory and Applications, 33 (5): 379-391 (2005)Compact implementation of linear weighted CMOS transconductance adder based on the flipped voltage follower., , , , and . ISCAS, IEEE, (2006)CMOS Transconductors With Continuous Tuning Using FGMOS Balanced Output Current Scaling., , , and . IEEE J. Solid State Circuits, 43 (5): 1313-1323 (2008)Low-Voltage Super class AB CMOS OTA cells with very high slew rate and power efficiency., , , and . IEEE J. Solid State Circuits, 40 (5): 1068-1077 (2005)High-speed high-precision CMOS analog rank order filter with O(n) complexity., , , and . IEEE J. Solid State Circuits, 40 (6): 1238-1248 (2005)Analysis of a negative impedance converter as a temperature compensator for bridge sensors., , , and . IEEE Trans. Instrumentation and Measurement, 52 (4): 1068-1072 (2003)Low-Voltage Universal Cell (LVUC): A Compact Analog/Digital Logic Block for Mixed Signal FPGAs., , , , and . CICC, page 1-4. IEEE, (2006)Low-Voltage CMOS Single Ended and Fully Differential Amplifier with Programmable Gain., , , , and . ISCAS, page 2200-2203. IEEE, (2007)Power efficient fully differential low-voltage two stage class AB/AB op-amp architectures., , , and . ISCAS (1), page 733-736. IEEE, (2004)Low-voltage CMOS analog four quadrant multiplier based on flipped voltage followers., , , and . ISCAS (1), page 681-684. IEEE, (2004)