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Disambiguation of "Garbolino, Tomasz"

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Fast and low-area TPGs based on T-type flip-flops can be easily integrated to the scan path.

, , and . ETW, page 161-166. IEEE Computer Society, (2000)

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To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Tomasz Kupka

Ascheablagerungsprobleme bei der Mitverbrennung von alternativen Brennstoffen in Steinkohlekraftwerken. TU Clausthal-Zellerfeld, (2009)

Tomasz Wocjan

Dynamics of DNA in nucleosomes and plasmids studied by Brownian dynamics. Uni Heidelberg, (2009)

Tomasz Mistrzyk

Filip Tomasz

Tomasz Czajkowski

 

Other publications of authors with the same name

Test-Per-Clock Logic BIST with Semi-Deterministic Test Patterns and Zero-Aliasing Compactor., , , , , and . J. Electron. Test., 20 (1): 109-122 (2004)Efficient test pattern generators based on specific cellular automata structures., and . Microelectron. Reliab., 42 (6): 975-983 (2002)Test-per-Clock Detection, Localization and Identification of Interconnect Faults., , , and . ETS, page 233-238. IEEE Computer Society, (2006)Deterministic Test Pattern Generator Design., , and . EvoWorkshops, volume 4974 of Lecture Notes in Computer Science, page 204-213. Springer, (2008)Designing of Test Pattern Generators for stimulation of crosstalk faults in bus-type connections.. DDECS, page 270-273. IEEE Computer Society, (2014)Effective BIST for crosstalk faults in interconnects., , , and . DDECS, page 164-169. IEEE Computer Society, (2009)Reduced-size signature-based diagnostic dictionary for interconnection testing., , and . PDeS, page 82-87. International Federation of Automatic Control, (2010)Fast and low-area TPGs based on T-type flip-flops can be easily integrated to the scan path., , and . ETW, page 161-166. IEEE Computer Society, (2000)Genetic algorithm for test pattern generator design - Automatic evolution of circuits., and . Appl. Intell., 32 (2): 193-204 (2010)Interconnect Faults Identification and Localization Using Modified Ring LFSRs., , , and . DDECS, page 247-250. IEEE Computer Society, (2008)