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A 6.5-12.5-Gb/s Half-Rate Single-Loop All-Digital Referenceless CDR in 28-nm CMOS.

C. Yu, E. Sa, S. Jin, H. Park, J. Shin, and J. Burm. IEEE J. Solid State Circuits, 55 (10): 2831-2841 (2020)

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Jinwook Chung

Jinwook Seo

Gerd Burmann

Viktor Burmester

Richard Burmeister

Other publications of authors with the same name

A Sub-Harmonic RF Transmitter Architecture with Simultaneous Power Combination and LO Leakage Cancellation.B. Song, D. Kim, K. Kim, and J. Burm. IEICE Trans. Electron., 94-C (5): 858-861 (2011)A Phase Noise Optimized 4 GHz Differential Colpitts VCO.H. Ahn, and J. Burm. IEICE Trans. Electron., 93-C (3): 420-422 (2010)A 8-bit DPWM-based Analog Bypass Circuit and System for LED Matrix Headlamp in High-Voltage 180-nm CMOS Technology.J. Chae, J. Jeong, B. Park, and J. Burm. ISOCC, page 263-264. IEEE, (2023)A low-complexity fast-locking digital PLL with multi-output bang-bang phase detector.Q. Huang, C. Zhan, and J. Burm. APCCAS, page 418-420. IEEE, (2016)Multi-Stage Reconfigurable RF-DC Converter With Deep-n-Well Biasing Using Body-Isolated MOSFET in 180-nm BCDMOS Process.J. Park, Y. Kim, Y. Cho, and J. Burm. IEEE Trans. Circuits Syst. II Express Briefs, 70 (10): 3817-3821 (October 2023)A 4-MHz Digitally Controlled Voltage-Mode Buck Converter With Embedded Transient Improvement Using Delay Line Control Techniques.Q. Huang, C. Zhan, and J. Burm. IEEE Trans. Circuits Syst., 67-I (11): 4029-4040 (2020)A 12-bit 5MS/s Synchronous SAR ADC With Comparator Using High Gain Pre-amplifier.Y. Cho, J. Jeong, and J. Burm. ISOCC, page 133-135. IEEE, (2023)Electro-Optical Phase Locked Loop design for FMCW LiDAR TX in 28-nm CMOS.E. Kim, and J. Burm. ISOCC, page 281-282. IEEE, (2023)A 6.5-12.5-Gb/s Half-Rate Single-Loop All-Digital Referenceless CDR in 28-nm CMOS.C. Yu, E. Sa, S. Jin, H. Park, J. Shin, and J. Burm. IEEE J. Solid State Circuits, 55 (10): 2831-2841 (2020)An Autofocus Sensor With Global Shutter Using Offset-Free Frame Memory.B. Song, N. Cho, B. Kim, J. Choi, Y. Kim, and J. Burm. IEEE Trans. Circuits Syst. II Express Briefs, 57-II (11): 878-882 (2010)

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Disambiguation of "Burm, Jinwook"

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A 6.5-12.5-Gb/s Half-Rate Single-Loop All-Digital Referenceless CDR in 28-nm CMOS.

Please choose a person to relate this publication to

Jinwook Chung

Jinwook Seo

Gerd Burmann

Viktor Burmester

Richard Burmeister

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Burm, Jinwook"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML A 6.5-12.5-Gb/s Half-Rate Single-Loop All-Digital Referenceless CDR in 28-nm CMOS.

Please choose a person to relate this publication to

Jinwook Chung

Jinwook Seo

Gerd Burmann

Viktor Burmester

Richard Burmeister

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

A 6.5-12.5-Gb/s Half-Rate Single-Loop All-Digital Referenceless CDR in 28-nm CMOS.