( en | de | ru )

 

Disambiguation of "Evain, Samuel"

Author of the publication

copydeleteadd this publication to your clipboard
Shadow-scan design with low latency overhead and in-situ slack-time monitoring.

, , , , , , and . ETS, page 1-6. IEEE, (2014)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Andéol Évain

Samuel Kodjo

Samuel Adler

Samuel Leipuner

Samuel Goldberg

 

Other publications of authors with the same name

Programmable extended SEC-DED codes for memory errors., , , and . VTS, page 140-145. IEEE Computer Society, (2011)Automated derivation of NoC Communication Specifications from Application Constraints., , , and . SiPS, page 238-243. IEEE, (2006)Memory Reliability Improvement Based on Maximized Error-Correcting Codes., , and . J. Electron. Test., 29 (4): 601-608 (2013)Memory reliability improvements based on maximized error-correcting codes., , and . European Test Symposium, page 1-6. IEEE Computer Society, (2012)Programmable restricted SEC codes to mask permanent faults in semiconductor memories., , and . IOLTS, page 147-153. IEEE Computer Society, (2010)Scan design with shadow flip-flops for low performance overhead and concurrent delay fault detection., , , , and . DATE, page 1077-1082. EDA Consortium San Jose, CA, USA / ACM DL, (2013)Error-correction schemes with erasure information for fast memories., and . ETS, page 1-6. IEEE Computer Society, (2013)NoC Design Flow for TDMA and QoS Management in a GALS Context., , and . EURASIP J. Embed. Syst., (2006)System-level hardware-based protection of memories against soft-errors., , , , and . DATE, page 1222-1225. IEEE, (2009)Error Correction Schemes with Erasure Information for Fast Memories., , and . J. Electron. Test., 30 (2): 183-192 (2014)