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A defect-tolerant area-efficient multiplexer for basic blocks in SRAM-based FPGAs., , , , and . Microelectron. Reliab., 53 (9-11): 1189-1193 (2013)SNaP: A novel hybrid method for circuit reliability assessment under multiple faults., , , and . Microelectron. Reliab., 53 (9-11): 1230-1234 (2013)Addressing Failure and Aging Degradation in MRAM/MeRAM-on-FDSOI Integration., , , , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 66-I (1): 239-250 (2019)Methods and Metrics for Reliability Assessment., , , and . Fault-Tolerant Distributed Algorithms on VLSI Chips, volume 08371 of Dagstuhl Seminar Proceedings, Schloss Dagstuhl - Leibniz-Zentrum für Informatik, Germany, (2008)Automatic selective hardening against soft errors: A cost-based and regularity-aware approach., , , and . ICECS, page 753-756. IEEE, (2012)Exploring the feasibility of selective hardening for combinational logic., , , and . Microelectron. Reliab., 52 (9-10): 1843-1847 (2012)Scan design with shadow flip-flops for low performance overhead and concurrent delay fault detection., , , , and . DATE, page 1077-1082. EDA Consortium San Jose, CA, USA / ACM DL, (2013)Analytical methods to assess transient faults effects in logic circuits.. MWSCAS, page 667-670. IEEE, (2014)Dependable STT-MRAM With Emerging Approximation and Speculation Paradigms., , , , and . IEEE Des. Test, 40 (3): 17-25 (June 2023)Writing-only in-MRAM computing paradigm for ultra-low power applications., , , , , and . Microprocess. Microsystems, (April 2022)