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Distributed simulation of polychronous and plastic spiking neural networks: strong and weak scaling of a representative mini-application benchmark executed on a small-scale commodity cluster., , , , , , , , , and . CoRR, (2013)Design and implementation of a modular, low latency, fault-aware, FPGA-based network interface., , , , , , , , , and . ReConFig, page 1-6. IEEE, (2013)ASIP acceleration for virtual-to-physical address translation on RDMA-enabled FPGA-based network interfaces., , , , , , , , , and 2 other author(s). Future Gener. Comput. Syst., (2015)Real-Time Cortical Simulations: Energy and Interconnect Scaling on Distributed Systems., , , , , , , , , and 4 other author(s). PDP, page 283-290. IEEE, (2019)NaNet: a Low-Latency, Real-Time, Multi-Standard Network Interface Card with GPUDirect Features., , , , , , , , , and 7 other author(s). CoRR, (2014)Scaling to 1024 software processes and hardware cores of the distributed simulation of a spiking neural network including up to 20G synapses., , , , , , , , , and . CoRR, (2015)Large Scale Low Power Computing System - Status of Network Design in ExaNeSt and EuroExa Projects., , , , , , , , , and 3 other author(s). CoRR, (2018)The ExaNeSt Project: Interconnects, Storage, and Packaging for Exascale Systems., , , , , , , , , and 17 other author(s). DSD, page 60-67. IEEE Computer Society, (2016)Gaussian and Exponential Lateral Connectivity on Distributed Spiking Neural Network Simulation., , , , , , , , , and 3 other author(s). PDP, page 658-665. IEEE Computer Society, (2018)The INFN COSA Project: Low-Power Computing and Storage., , , , , , , , , and 9 other author(s). PARCO, volume 32 of Advances in Parallel Computing, page 770-779. IOS Press, (2017)