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Disambiguation of "Asada, Kunihiro"

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Novel technique for minimizing the comparator delay dispersion in 65nm CMOS technology.

, , , , and . ICECS, page 220-223. IEEE, (2011)

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Kunihiro Jojima

 

Other publications of authors with the same name

A general and efficient mask pattern generator for non-series-parallel CMOS transistor network., and . Synthesis for Control Dominated Circuits, volume A-22 of IFIP Transactions, page 323-333. North-Holland, (1992)Range extension of inductive coupling communication using multi-stage resonance., , and . ISCIT, page 758-763. IEEE, (2012)A subsampling stochastic coarse-fine ADC with SNR 55.3dB and >5.8TS/s effective sample rate for an on-chip signal analyzer., , , and . ISCAS, page 93-96. IEEE, (2014)Power supply impedance emulation to eliminate overkills and underkills due to the impedance difference between ATE and customer board., , , , , , and . ITC, page 1-8. IEEE, (2016)A 16-bit 2.0-ps Resolution Two-Step TDC in 0.18-µm CMOS Utilizing Pulse-Shrinking Fine Stage With Built-In Coarse Gain Calibration., , , , and . IEEE Trans. Very Large Scale Integr. Syst., 27 (1): 11-19 (2019)Timing-Aware Cell Layout De-Compaction for Yield Optimization by Critical Area Minimization., , and . IEEE Trans. Very Large Scale Integr. Syst., 15 (6): 716-720 (2007)Quick-Start Pulse Width Controlled PLL with Frequency and Phase Presetting., , , and . IEICE Trans. Electron., 101-C (4): 218-223 (2018)A Structured Routing Architecture for Practical Application of Character Projection Method in Electron-Beam Direct Writing., , , , , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 97-A (8): 1688-1698 (2014)On-Chip Switched Decoupling Capacitor for Fast Voltage Hopping of DVS Systems., , , , and . IEICE Trans. Electron., 96-C (4): 560-567 (2013)Low Pass Filter-Less Pulse Width Controlled PLL Using Time to Soft Thermometer Code Converter., and . IEICE Trans. Electron., 95-C (2): 297-302 (2012)