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Investigating the CDM susceptibility of IC's at package and wafer level by capacitive coupled TLP.

H. Wolf, H. Gieser, and D. Walter. Microelectron. Reliab., 49 (12): 1476-1481 (2009)

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Horst Gieser

Ralf Gieser

Eugenie Gieser

Eduard Gieser

Ulrike Gieser

Other publications of authors with the same name

Integrated flow for reverse engineering of nanoscale technologies.B. Lippmann, M. Werner, N. Unverricht, A. Singla, P. Egger, A. Dübotzky, H. Gieser, M. Rasche, O. Kellermann, and H. Graeb. ASP-DAC, page 82-89. ACM, (2019)ESD Susceptibility of Submicron Air Gaps.H. Wolf, H. Gieser, D. Bonfert, and M. Hauser. Microelectron. Reliab., 46 (9-11): 1587-1590 (2006)Capacitively coupled transmission line pulsing cc-TLP--a traceable and reproducible stress method in the CDM-domain.H. Wolf, H. Gieser, W. Stadler, and W. Wilkening. Microelectron. Reliab., 45 (2): 279-285 (2005)Transient latch-up: experimental analysis and device simulation.S. Bargstädt-Franke, W. Stadler, K. Esmark, M. Streibl, K. Domanski, H. Gieser, H. Wolf, and W. Bala. Microelectron. Reliab., 45 (2): 297-304 (2005)Electrostatic discharge sensitivity investigation on organic field-effect thin film transistors.T. Lim, H. Gieser, L. Santarelli, and F. Cacialli. NEWCAS, page 1-4. IEEE, (2015)Transient-induced latch-up test setup for wafer-level and package-level.D. Bonfert, H. Gieser, H. Wolf, M. Frank, A. Konrad, and J. Schulz. Microelectron. Reliab., 46 (9-11): 1629-1633 (2006)Investigating the CDM susceptibility of IC's at package and wafer level by capacitive coupled TLP.H. Wolf, H. Gieser, and D. Walter. Microelectron. Reliab., 49 (12): 1476-1481 (2009)On-chip electrostatic discharge ESD.H. Gieser. Microelectron. Reliab., 43 (7): 985-986 (2003)Physical and Functional Reverse Engineering Challenges for Advanced Semiconductor Solutions.B. Lippmann, A. Bette, M. Ludwig, J. Mutter, J. Baehr, A. Hepp, H. Gieser, N. Kovac, T. Zweifel, M. Rasche and 1 other author(s). DATE, page 796-801. IEEE, (2022)Study of CDM specific effects for a smart power input protection structure.M. Etherton, N. Qu, J. Willemen, W. Wilkening, S. Mettler, M. Dissegna, R. Stella, L. Zullino, A. Andreini, and H. Gieser. Microelectron. Reliab., 46 (5-6): 666-676 (2006)

BibSonomy

Disambiguation of "Gieser, Horst A."

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Investigating the CDM susceptibility of IC's at package and wafer level by capacitive coupled TLP.

Please choose a person to relate this publication to

Horst Gieser

Ralf Gieser

Eugenie Gieser

Eduard Gieser

Ulrike Gieser

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Gieser, Horst A."

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Investigating the CDM susceptibility of IC's at package and wafer level by capacitive coupled TLP.

Please choose a person to relate this publication to

Horst Gieser

Ralf Gieser

Eugenie Gieser

Eduard Gieser

Ulrike Gieser

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

Investigating the CDM susceptibility of IC's at package and wafer level by capacitive coupled TLP.