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Disambiguation of "Devadas, Srinivas"

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Circuit Fingerprinting Attacks: Passive Deanonymization of Tor Hidden Services.

, , , , and . USENIX Security Symposium, page 287-302. USENIX Association, (2015)

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Vinay Devadas

Deepika Devadas

Srinivas Jagarlamudi

Srinivas Yarlanki

Girish Srinivas

 

Other publications of authors with the same name

Effects of Memory Performance on Parallel Job Scheduling., , and . JSSPP, volume 2221 of Lecture Notes in Computer Science, page 116-132. Springer, (2001)AEGIS: A single-chip secure processor., , and . Inf. Secur. Tech. Rep., 10 (2): 63-73 (2005)Access-controlled resource discovery in pervasive networks., , , , and . Concurr. Pract. Exp., 16 (11): 1099-1120 (2004)Analysis and Evaluation of Address Arithmetic Capabilities in Custom DSP Architectures., , and . Des. Autom. Embed. Syst., 4 (1): 5-22 (1999)Topological Optimization of Multiple-Level Array Logic., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 6 (6): 915-941 (1987)Code density optimization for embedded DSP processors using data compression techniques., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 17 (7): 601-608 (1998)Verification of relations between synchronous machines., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 12 (12): 1947-1959 (1993)Logic verification algorithms and their parallel implementation., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 8 (2): 181-189 (1989)A unified approach to the synthesis of fully testable sequential machines., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 10 (1): 39-50 (1991)Irredundant sequential machines via optimal logic synthesis., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 9 (1): 8-18 (1990)