Author of the publication

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Effects of Lightly Doped Drain and Channel Doping Variations on Flash Memory Performances and Reliability., , , , , , and . J. Low Power Electron., 8 (5): 717-724 (2012)Dual Detection of Heating and Photocurrent attacks (DDHP) Sensor using Hybrid CMOS/STT-MRAM., , , , , , and . IOLTS, page 322-327. IEEE, (2019)Impact of endurance degradation on the programming efficiency and the energy consumption of NOR flash memories., , , , and . Microelectron. Reliab., 54 (9-10): 2262-2265 (2014)Extraction of 3D parasitic capacitances in 90 nm and 22 nm NAND flash memories., , , , , , and . Microelectron. Reliab., 49 (9-11): 1056-1059 (2009)Light-Weight Cipher Based on Hybrid CMOS/STT-MRAM: Power/Area Analysis., , , , , , and . ISCAS, page 1-5. IEEE, (2019)Leakage paths identification in NVM using biased data retention., , , , , and . Microelectron. Reliab., 50 (9-11): 1474-1478 (2010)Access resistor modelling for EEPROM's retention test vehicle., , and . Microelectron. Reliab., 53 (9-11): 1218-1223 (2013)True random number generation exploiting SET voltage variability in resistive RAM memory arrays., , , , , , and . NVMTS, page 1-5. IEEE, (2019)Resistive RAM SET and RESET Switching Voltage Evaluation as an Entropy Source for Random Number Generation., , , , and . DFT, page 1-4. IEEE, (2020)MRAM: from STT to SOT, for security and memory., , , , , , , , and . DCIS, page 1-6. IEEE, (2018)