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Inserting permanent fault input dependence on PTM to improve robustness evaluation., , , , , and . SBCCI, page 1-6. IEEE, (2016)Radiation Effects in XOR Logic Gates at 16nm CMOS and FinFET Technology., , and . ICECS, page 590-593. IEEE, (2019)Logic and Physical Synthesis of Cell Arrays., , and . ICECS, page 1292-1295. IEEE, (2007)Impact of Near-Threshold and Variability on 7nm FinFET XOR Circuits., , and . ICECS, page 573-576. IEEE, (2018)Temperature dependence and ZTC bias point evaluation of sub 20nm bulk multigate devices., , , and . ICECS, page 270-273. IEEE, (2017)Impact of different transistor arrangements on gate variability., , , , , and . Microelectron. Reliab., (2018)Evaluation of heavy-ion impact in bulk and FDSOI devices under ZTC condition., , , , and . Microelectron. Reliab., (2017)Accuracy-Configurable 2-D Gaussian Filter Architecture for Energy-Efficient Image Processing., , , and . IEEE Des. Test, 39 (2): 31-37 (2022)Multi-Level Design Influences on Robustness Evaluation of 7nm FinFET Technology., , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 67-I (2): 553-564 (2020)Approximation Workflow for Energy-Efficient Comparators in Decision Tree Applications., , and . VLSI-SoC, page 1-2. IEEE, (2022)