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Disambiguation of "Viejo, Julian"

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Long-term on-chip verification of systems with logical events scattered in time.

, , , , , and . Microprocess. Microsystems, 36 (5): 402-408 (2012)

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Julian Grapengiesser

Mit Ungewissheit planen: eine Untersuchung verschiedener Ansätze der Handhabung von Ungewissheit in komplexen Planungsprozessen. Uni Stuttgart, (2009)

Julian Gonska

Mikromechanische Biegebalken als hochsensitive Sensoren. Uni Freiburg, (2009)

Julian Künzel

Rolle neurotroper und muskulotroper Spasmolytika in der In-vitro-Fertilisation (IVF): Untersuchungen am perfundierten Schweineuterus. Uni Erlangen-Nürnberg, (2009)

Julian Horst

Die verbindliche Auskunft nach § 89 Abgabenordnung. Uni Münster, (2009)

Julian Barbour

 

Other publications of authors with the same name

Network Time Synchronization: A Full Hardware Approach., , and . PATMOS, volume 7606 of Lecture Notes in Computer Science, page 225-234. Springer, (2012)Fast-Convergence Microsecond-Accurate Clock Discipline Algorithm for Hardware Implementation., , , , and . IEEE Trans. Instrum. Meas., 60 (12): 3961-3963 (2011)Design of a FFT/IFFT module as an IP core suitable for embedded systems., , , , , , , and . SIES, page 337-340. IEEE, (2007)Application of Internode Model to Global Power Consumption Estimation in SCMOS Gates., , , , , , and . PATMOS, volume 3728 of Lecture Notes in Computer Science, page 337-347. Springer, (2005)Logic-Level Fast Current Simulation for Digital CMOS Circuits., , , , , , and . PATMOS, volume 3728 of Lecture Notes in Computer Science, page 425-435. Springer, (2005)Studying the Viability of Static Complementary Metal-Oxide-Semiconductor Gates with a Large Number of Inputs When Using Separate Transistor Wells., , , , , , and . J. Low Power Electron., 7 (3): 444-452 (2011)Address-encoded byte order., , , , , , , and . Microprocess. Microsystems, (2020)Design and implementation of a suitable core for on-chip long-term verification., , , , , and . SIES, page 234-237. IEEE, (2010)Long-term on-chip verification of systems with logical events scattered in time., , , , , and . Microprocess. Microsystems, 36 (5): 402-408 (2012)Power Dissipation Associated to Internal Effect Transitions in Static CMOS Gates., , , , , and . PATMOS, volume 5349 of Lecture Notes in Computer Science, page 389-398. Springer, (2008)