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Exploiting Early Partial Reconfiguration of Run-Time Reconfigurable FPGAs in Embedded Systems Design., , and . FPGA, page 247. ACM, (1999)Self-timed divider based on RSD number system., and . IEEE Trans. Very Large Scale Integr. Syst., 4 (2): 292-295 (1996)Partial bus-invert coding for power optimization of application-specific systems., , and . IEEE Trans. Very Large Scale Integr. Syst., 9 (2): 377-383 (2001)Performance improvement of geographically distributed cosimulation by hierarchically grouped messages., , and . IEEE Trans. Very Large Scale Integr. Syst., 8 (5): 492-502 (2000)A deadlock-free routing algorithm requiring no virtual channel on 3D-NoCs with partial vertical connections., and . NOCS, page 1-2. IEEE, (2013)Message from the general chairs., and . VLSI-SoC, page VIII. IEEE, (2015)Dynamic error tracking and supply voltage adjustment for low power., and . VLSI-SoC, page 74-79. IEEE, (2015)Concept-aware ensemble system for pedestrian detection., , and . Intelligent Vehicles Symposium, page 140-145. IEEE, (2014)Aging Compensation With Dynamic Computation Approximation., , , , , , and . IEEE Trans. Circuits Syst. I Fundam. Theory Appl., 67-I (4): 1319-1332 (2020)Binary acceleration using coarse-grained reconfigurable architecture., , and . SIGARCH Comput. Archit. News, 38 (4): 33-39 (2010)