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Disambiguation of "Raveendran, Sithara"

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An Approximate Low-Power Lifting Scheme Using Reversible Logic.

, , , and . IEEE Access, (2020)

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Other publications of authors with the same name

Design and implementation of PID controller based on orthogonal wavelet filter-banks in FPGA., , , , and . ISED, page 1-6. IEEE, (2017)Design and implementation of image kernels using reversible logic gates., , , and . IET Image Process., 14 (16): 4110-4121 (2020)An Approximate Low-Power Lifting Scheme Using Reversible Logic., , , and . IEEE Access, (2020)Inexact Signed Wallace Tree Multiplier Design Using Reversible Logic., , , and . IEEE Access, (2021)Characterization of a Novel Low Leakage Power and Area Efficient 7T SRAM Cell., , , and . VLSID, page 202-206. IEEE Computer Society, (2016)FPGA realisation of PSNR and BPP driven Adaptive Compression and Encryption Algorithm for RGB Images., , , , , and . ICCCNT, page 35:1-35:6. ACM, (2016)Design and Implementation of Reversible Logic based RGB to Gray scale Color Space Converter., , , and . TENCON, page 1813-1817. IEEE, (2018)Implementation of adaptive image compression algorithm using varying bit-length daubechies wavelet coefficient with three-level encryption on Zynq 7000., , and . ISED, page 1-6. IEEE, (2017)On The Design Of Rationalised Bi-orthogonal Wavelet Using Reversible Logic., , , and . ISCAS, page 3428-3432. IEEE, (2022)FPGA Implementation of Square and Cube Architecture Using Vedic Mathematics., , , , , and . iSES, page 6-10. IEEE, (2018)