Author of the publication

Evaluating reconfigurable dataflow computing using the Himeno benchmark.

, , , and . ReConFig, page 1-7. IEEE, (2012)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Cool Chips III.. IEEE Micro, 20 (6): 83-84 (2000)Power Estimation of Partitioned Register Files in a Clustered Architecture with Performance Evaluation., , and . IEICE Trans. Inf. Syst., 90-D (3): 627-636 (2007)The Convergence of Asynchronous Iterations for the Fixed Point of a Splitting Operator., and . Parallel Algorithms Appl., 7 (3-4): 229-235 (1995)Toward Architecting and Designing Novel Computers.. Asia-Pacific Computer Systems Architecture Conference, volume 2823 of Lecture Notes in Computer Science, page 8-13. Springer, (2003)Automated Design of Wave Pipelined Multiport Register Files., , , , and . ASP-DAC, page 197-202. IEEE, (1998)Guest Editors' Introduction: ICFPT 2007., and . ACM Trans. Reconfigurable Technol. Syst., 2 (2): 7:1-7:2 (2009)A Competitive Learning Algorithm with Controlling Maximum Distortion., , , and . J. Adv. Comput. Intell. Intell. Informatics, 9 (2): 166-174 (2005)Realization of computers using programmable logic units., , , , and . Syst. Comput. Jpn., 18 (8): 47-56 (1987)A scheduling method for instruction-level parallel processing of vectorand scalar instructions., , , , and . Syst. Comput. Jpn., 30 (13): 23-33 (1999)Performance evaluation of a computer using programmable logic units., , , , and . Syst. Comput. Jpn., 18 (8): 57-66 (1987)