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Going Vertical: The Future of Electronics.. IEEE Micro, 39 (6): 6-7 (2019)Clone Detection in Sensor Networks with Ad Hoc and Grid Topologies., , , , и . IJDSN, 5 (3): 209-223 (2009)A scalable architecture for multi-class visual object detection., , , , и . FPL, стр. 1-8. IEEE, (2015)A hardware accelerated multilevel visual classifier for embedded visual-assist systems., , , , и . ICCAD, стр. 96-100. IEEE, (2014)An integer linear programming-based tool for wireless sensor networks., , , и . J. Parallel Distributed Comput., 65 (3): 247-260 (2005)Managing Leakage Energy in Cache Hierarchies., , , , , , и . J. Instruction-Level Parallelism, (2003)A clock power model to evaluate impact of architectural and technology optimizations., , и . IEEE Trans. Very Large Scale Integr. Syst., 10 (6): 844-855 (2002)Design considerations for databus charge recovery., , , и . IEEE Trans. Very Large Scale Integr. Syst., 9 (1): 104-106 (2001)On the Effects of Process Variation in Network-on-Chip Architectures., , , , , , и . IEEE Trans. Dependable Secur. Comput., 7 (3): 240-254 (2010)Harnessing ferroelectrics for non-volatile memories and logic., , , , , , и . ISQED, стр. 29-34. IEEE, (2017)