Author of the publication

A Framework for Scalable TSV Assignment and Selection in Three-Dimensional Networks-on-Chips.

, , , and . VLSI Design, (2017)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Rout3D: A lightweight adaptive routing algorithm for tolerating faulty vertical links in 3D-NoCs., , , and . ETS, page 1-6. IEEE, (2017)Parallel Volume Rendering for Ocean Visualization in a Cluster of PCs., , , , and . GEOINFO, page 291-304. INPE, (2004)A Runtime Fault-Tolerant Routing Scheme for Partially Connected 3D Networks-on-Chip., , , and . DFT, page 1-6. IEEE Computer Society, (2018)A Framework for Scalable TSV Assignment and Selection in Three-Dimensional Networks-on-Chips., , , and . VLSI Design, (2017)MINI-ESPADA: A low-cost fully adaptive routing mechanism for Networks-on-Chips., , , and . LATS, page 1-4. IEEE, (2017)A Dynamic Sufficient Condition of Deadlock-Freedom for High-Performance Fault-Tolerant Routing in Networks-on-Chips., , , and . IEEE Trans. Emerg. Top. Comput., 8 (3): 642-654 (2020)NoCFI: A Hybrid Fault Injection Method for Networks-On-Chip., , and . LATS, page 1-6. IEEE, (2019)A soft-error resilient route computation unit for 3D Networks-on-Chips., , , , and . DATE, page 1357-1362. IEEE, (2018)Detailed and highly parallelizable cycle-accurate network-on-chip simulation on GPGPU., , , and . ASP-DAC, page 672-677. IEEE, (2017)Work Distribution for Parallel ZSweep Algorithm., , , , and . SIBGRAPI, page 107-116. IEEE Computer Society, (2003)