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A reconfigurable sense amplifier with 3X offset reduction in 28nm FDSOI CMOS., , , , и . VLSIC, стр. 270-. IEEE, (2015)A 467nW CMOS visual motion sensor with temporal averaging and pixel aggregation., , , , , , и . ISSCC, стр. 480-481. IEEE, (2013)A Charge-Injection-Based Active-Decoupling Technique for Inductive-Supply-Noise Suppression., и . ISSCC, стр. 416-417. IEEE, (2008)Automatic Generation of Behavioral Models from Switch-Level Descriptions., , , , и . DAC, стр. 179-184. ACM Press, (1989)In situ delay-slack monitor for high-performance processors using an all-digital self-calibrating 5ps resolution time-to-digital converter., , , , , , и . ISSCC, стр. 188-189. IEEE, (2010)DVS for On-Chip Bus Designs Based on Timing Error Correction, , , , и . CoRR, (2007)Circuit optimization techniques to mitigate the effects of soft errors in combinational logic., , , и . ACM Trans. Design Autom. Electr. Syst., 15 (1): 5:1-5:27 (2009)Energy Efficient Adiabatic FRAM with 0.99 PJ/Bit Write for IoT Applications., , , , , , и . VLSI Circuits, стр. 85-86. IEEE, (2018)A library compatible driving point model for on-chip RLC interconnects., , и . Timing Issues in the Specification and Synthesis of Digital Systems, стр. 63-69. ACM, (2002)Active shielding of RLC global interconnects., , и . Timing Issues in the Specification and Synthesis of Digital Systems, стр. 98-104. ACM, (2002)