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Disambiguation of "Leenstra, Jens"

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The vector fixed point unit of the synergistic processor element of the cell architecture processor.

, , , , , , and . DATE Designers' Forum, page 244-248. European Design and Automation Association, Leuven, Belgium, (2006)

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Erika Jensen

Christian Jensen

Hans Jensen

Rudolf Jensen

Walter Jenssen

 

Other publications of authors with the same name

Issues in the test of artificial neural networks., , , and . ICCD, page 487-490. IEEE, (1989)Hierarchical test assembly for macro based VLSI design., and . ITC, page 520-529. IEEE Computer Society, (1990)Efficiency of Low Power Circuit Techniques in a 65 nm SOI-Process., , and . J. Low Power Electron., 3 (1): 54-59 (2007)Scan chain clustering for test power reduction., , , , , and . DAC, page 828-833. ACM, (2008)BIST Power Reduction Using Scan-Chain Disable in the Cell Processor., , , and . ITC, page 1-8. IEEE Computer Society, (2006)Hierarchical Random Simulation Approach for the Verification of S/390 CMOS Multiprocessors., , , , , , and . DAC, page 89-94. ACM Press, (1997)The vector fixed point unit of the synergistic processor element of the cell architecture processor., , , , , , and . ESSCIRC, page 203-206. IEEE, (2005)Scan Test Planning for Power Reduction., , , , and . DAC, page 521-526. IEEE, (2007)Hierarchical Test Program Development for Scan Testable Circuits., and . ITC, page 375-384. IEEE Computer Society, (1991)The vector fixed point unit of the synergistic processor element of the cell architecture processor., , , , , , and . DATE Designers' Forum, page 244-248. European Design and Automation Association, Leuven, Belgium, (2006)