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A Performance and Energy Comparison of Fault Tolerance Techniques for Exascale Computing Systems.

, , , and . CIT, page 436-443. IEEE Computer Society, (2016)

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Context-Aware Energy Enhancements for Smart Mobile Devices., , , , and . IEEE Trans. Mob. Comput., 13 (8): 1720-1732 (2014)COMET: A Cross-Layer Optimized Optical Phase Change Main Memory Architecture., , , , and . CoRR, (2023)POSEIDON: A framework for application-specific Network-on-Chip synthesis for heterogeneous chip multiprocessors., , and . ISQED, page 182-188. IEEE, (2011)Memory-aware circuit overlay NoCs for latency optimized GPGPU architectures., and . ISQED, page 63-68. IEEE, (2016)VISION: a framework for voltage island aware synthesis of interconnection networks-on-chip., and . ACM Great Lakes Symposium on VLSI, page 31-36. ACM, (2011)Dynamic register file resizing and frequency scaling to improve embedded processor performance and energy-delay efficiency., , , and . DAC, page 68-71. ACM, (2008)SOTERIA: exploiting process variations to enhance hardware security with photonic NoC architectures., , , and . DAC, page 81:1-81:6. ACM, (2018)Exploring hybrid photonic networks-on-chip foremerging chip multiprocessors., and . CODES+ISSS, page 129-136. ACM, (2009)A Hidden Markov Model based smartphone heterogeneity resilient portable indoor localization framework., , , and . J. Syst. Archit., (2020)Run-time laser power management in photonic NoCs with on-chip semiconductor optical amplifiers., , and . NOCS, page 1-4. IEEE, (2016)