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A Fully Integrated System-on-Chip Design with Scalable Resistive Random-Access Memory Tile Design for Analog in-Memory Computing.

F. Cai, S. Yen, A. Uppala, L. Thomas, T. Liu, P. Fu, X. Zhang, A. Low, D. Kamalanathan, J. Hsu, and B. Ayyagari-Sangamalli. Adv. Intell. Syst., (2022)

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Liu Liu

Keetsin Liu

Ching Liu

Other publications of authors with the same name

An adaptive graph learning method based on dual data representations for clustering.T. Liu, C. Lekamalage, G. Huang, and Z. Lin. Pattern Recognit., (2018)Neural Acoustic-Phonetic Approach for Speaker Verification With Phonetic Attention Mask.T. Liu, R. Das, K. Lee, and H. Li. IEEE Signal Process. Lett., (2022)AimDroid: Activity-Insulated Multi-level Automated Testing for Android Applications.T. Gu, C. Cao, T. Liu, C. Sun, J. Deng, X. Ma, and J. Lu. ICSME, page 103-114. IEEE Computer Society, (2017)Extreme Learning Machine for Joint Embedding and Clustering.T. Liu, L. Kasun, G. Huang, and Z. Lin. Neurocomputing, (2018)A Fully Integrated System-on-Chip Design with Scalable Resistive Random-Access Memory Tile Design for Analog in-Memory Computing.F. Cai, S. Yen, A. Uppala, L. Thomas, T. Liu, P. Fu, X. Zhang, A. Low, D. Kamalanathan, J. Hsu and 1 other author(s). Adv. Intell. Syst., (2022)Speaker-Utterance Dual Attention for Speaker and Utterance Verification.T. Liu, R. Das, M. Madhavi, S. Shen, and H. Li. INTERSPEECH, page 4293-4297. ISCA, (2020)Smile detection using Pair-wise Distance Vector and Extreme Learning Machine.D. Cui, G. Huang, and T. Liu. IJCNN, page 2298-2305. IEEE, (2016)MFA: TDNN with Multi-Scale Frequency-Channel Attention for Text-Independent Speaker Verification with Short Utterances.T. Liu, R. Das, K. Lee, and H. Li. ICASSP, page 7517-7521. IEEE, (2022)A Unified Framework for Speaker and Utterance Verification.T. Liu, M. Madhavi, R. Das, and H. Li. INTERSPEECH, page 4320-4324. ISCA, (2019)Disentangling Voice and Content with Self-Supervision for Speaker Recognition.T. Liu, K. Lee, Q. Wang, and H. Li. CoRR, (2023)

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Disambiguation of "Liu, Tianchi"

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A Fully Integrated System-on-Chip Design with Scalable Resistive Random-Access Memory Tile Design for Analog in-Memory Computing.

Please choose a person to relate this publication to

Liu Liu

Liu Liu

Liu Liu

Keetsin Liu

Ching Liu

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Liu, Tianchi"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML A Fully Integrated System-on-Chip Design with Scalable Resistive Random-Access Memory Tile Design for Analog in-Memory Computing.

Please choose a person to relate this publication to

Liu Liu

Liu Liu

Liu Liu

Keetsin Liu

Ching Liu

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
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MSOffice XML

A Fully Integrated System-on-Chip Design with Scalable Resistive Random-Access Memory Tile Design for Analog in-Memory Computing.