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Amber: A 367 GOPS, 538 GOPS/W 16nm SoC with a Coarse-Grained Reconfigurable Array for Flexible Acceleration of Dense Linear Algebra.

A. Carsello, K. Feng, T. Kong, K. Koul, Q. Liu, J. Melchert, G. Nyengele, M. Strange, K. Zhang, A. Nayak, J. Setter, J. Thomas, K. Sreedhar, P. Chen, N. Bhagdikar, Z. Myers, B. D'Agostino, P. Joshi, S. Richardson, R. Bahr, C. Torng, M. Horowitz, and P. Raina. VLSI Technology and Circuits, page 70-71. IEEE, (2022)

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Laurence Maxwell

Hugh Maxwell

Maxwell Kusi-Mensah

Maxwell Ralph Jacobs

William Cary Maxwell

Other publications of authors with the same name

Amber: Coarse-Grained Reconfigurable Array-Based SoC for Dense Linear Algebra Acceleration.K. Feng, A. Carsello, T. Kong, K. Koul, Q. Liu, J. Melchert, G. Nyengele, M. Strange, K. Zhang, A. Nayak and 13 other author(s). HCS, page 1-30. IEEE, (2022)Creating an Agile Hardware Design Flow.R. Bahr, C. Barrett, N. Bhagdikar, A. Carsello, R. Daly, C. Donovick, D. Durst, K. Fatahalian, K. Feng, P. Hanrahan and 22 other author(s). DAC, page 1-6. IEEE, (2020)Accelerating Large-Scale Graph Analytics with FPGA and HMC.S. Khoram, J. Zhang, M. Strange, and J. Li. FCCM, page 82. IEEE Computer Society, (2017)The Sparse Abstract Machine.O. Hsu, M. Strange, R. Sharma, J. Won, K. Olukotun, J. Emer, M. Horowitz, and F. Kjølstad. ASPLOS (3), page 710-726. ACM, (2023)Accelerating Graph Analytics by Co-Optimizing Storage and Access on an FPGA-HMC Platform.S. Khoram, J. Zhang, M. Strange, and J. Li. FPGA, page 239-248. ACM, (2018)Amber: A 16-nm System-on-Chip With a Coarse- Grained Reconfigurable Array for Flexible Acceleration of Dense Linear Algebra.K. Feng, T. Kong, K. Koul, J. Melchert, A. Carsello, Q. Liu, G. Nyengele, M. Strange, K. Zhang, A. Nayak and 12 other author(s). IEEE J. Solid State Circuits, 59 (3): 947-959 (March 2024)Automating System Configuration.N. Tsiskaridze, M. Strange, M. Mann, K. Sreedhar, Q. Liu, M. Horowitz, and C. Barrett. FMCAD, page 102-111. IEEE, (2021)Amber: A 367 GOPS, 538 GOPS/W 16nm SoC with a Coarse-Grained Reconfigurable Array for Flexible Acceleration of Dense Linear Algebra.A. Carsello, K. Feng, T. Kong, K. Koul, Q. Liu, J. Melchert, G. Nyengele, M. Strange, K. Zhang, A. Nayak and 13 other author(s). VLSI Technology and Circuits, page 70-71. IEEE, (2022)The Sparse Abstract Machine.O. Hsu, M. Strange, J. Won, R. Sharma, K. Olukotun, J. Emer, M. Horowitz, and F. Kjolstad. CoRR, (2022)AHA: An Agile Approach to the Design of Coarse-Grained Reconfigurable Accelerators and Compilers.K. Koul, J. Melchert, K. Sreedhar, L. Truong, G. Nyengele, K. Zhang, Q. Liu, J. Setter, P. Chen, Y. Mei and 23 other author(s). ACM Trans. Embed. Comput. Syst., 22 (2): 35:1-35:34 (March 2023)

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Disambiguation of "Strange, Maxwell"

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Amber: A 367 GOPS, 538 GOPS/W 16nm SoC with a Coarse-Grained Reconfigurable Array for Flexible Acceleration of Dense Linear Algebra.

Please choose a person to relate this publication to

Laurence Maxwell

Hugh Maxwell

Maxwell Kusi-Mensah

Maxwell Ralph Jacobs

William Cary Maxwell

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Strange, Maxwell"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Amber: A 367 GOPS, 538 GOPS/W 16nm SoC with a Coarse-Grained Reconfigurable Array for Flexible Acceleration of Dense Linear Algebra.

Please choose a person to relate this publication to

Laurence Maxwell

Hugh Maxwell

Maxwell Kusi-Mensah

Maxwell Ralph Jacobs

William Cary Maxwell

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
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MSOffice XML

Amber: A 367 GOPS, 538 GOPS/W 16nm SoC with a Coarse-Grained Reconfigurable Array for Flexible Acceleration of Dense Linear Algebra.