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Cross-fertilizing FSM verification techniques and sequential diagnosis., , , , и . EURO-DAC, стр. 306-311. IEEE Computer Society Press, (1992)SAT solver management strategies in IC3: an experimental approach., , , , и . Formal Methods Syst. Des., 50 (1): 39-74 (2017)TPDL: Extended Temporal Profile Description Language., , , и . Softw. Pract. Exp., 21 (4): 355-374 (1991)Symbolic traversals of data paths with auxiliary variables., , и . Great Lakes Symposium on VLSI, стр. 93-96. IEEE, (1994)Verification and synthesis of counters based on symbolic techniques., , , и . ED&TC, стр. 176-181. IEEE Computer Society, (1997)A functional approach to formal hardware verification: the MTI experience., , , и . ICCD, стр. 592-595. IEEE, (1988)Trading-Off SAT Search and Variable Quantifications for Effective Unbounded Model Checking., , , , , и . FMCAD, стр. 1-8. IEEE, (2008)Diagnosis oriented test pattern generation., , , и . EURO-DAC, стр. 470-474. IEEE Computer Society, (1990)A simulation-based approach to test pattern generation for synchronous sequential circuits., , , и . VTS, стр. 263-267. IEEE Computer Society, (1992)Automated abstraction by incremental refinement in interpolant-based model checking., , и . ICCAD, стр. 129-136. IEEE Computer Society, (2008)