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Disambiguation of "Otsuka, Nobuaki"

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DFT Techniques for Wafer-Level At-Speed Testing of High-Speed SRAMs.

, , , , , , , and . ITC, page 164-169. IEEE Computer Society, (2002)

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Nobuaki Kobayashi

O Otsuka

 

Other publications of authors with the same name

An RF MEMS Variable Capacitor with Intelligent Bipolar Actuation., , , , , , , , , and 3 other author(s). ISSCC, page 582-583. IEEE, (2008)Direct Cell-Stability Test Techniques for an SRAM Macro with Asymmetric Cell-Bias-Voltage Modulation., , , , , , and . ITC, page 1-7. IEEE Computer Society, (2008)DFT techniques for memory macro with built-in ECC., , , and . MTDT, page 109-114. IEEE Computer Society, (2005)A low leakage SRAM macro with replica cell biasing scheme., , , , and . IEEE J. Solid State Circuits, 41 (4): 815-822 (2006)Circuit techniques for 1.5-V power supply flash memory., and . IEEE J. Solid State Circuits, 32 (8): 1217-1230 (1997)A 0.13 µm CMOS Bluetooth EDR Transceiver with High Sensitivity over Wide Temperature Range and Immunity to Process Variation., , , , , , , , , and 7 other author(s). IEICE Trans. Electron., 93-C (6): 803-811 (2010)A Single-Power-Supply 0.7V 1GHz 45nm SRAM with An Asymmetrical Unit-×-ratio Memory Cell., , , , , , , , , and 1 other author(s). ISSCC, page 382-383. IEEE, (2008)An 833MHz Pseudo-Two-Port Embedded DRAM for Graphics Applications., , , , , , , , , and 3 other author(s). ISSCC, page 276-277. IEEE, (2008)A -90 dBm sensitivity 0.13 μm CMOS bluetooth transceiver operating in wide temperature range., , , , , , , , , and 2 other author(s). CICC, page 655-658. IEEE, (2007)DFT Techniques for Wafer-Level At-Speed Testing of High-Speed SRAMs., , , , , , , and . ITC, page 164-169. IEEE Computer Society, (2002)