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Disambiguation of "Amano, Hideharu"

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From FLOPS to BYTES: disruptive change in high-performance computing towards the post-moore era.

, , , , , , , , , , and . Conf. Computing Frontiers, page 274-281. ACM, (2016)

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Hideharu Umehara

Kyoko Amano

Yu Amano

Shun'ichi Amano

 

Other publications of authors with the same name

An Automatic Mixed Software Hardware Pipeline Builder for CPU-FPGA Platforms., , and . CoRR, (2014)Performance evaluation of WASMII: a data driven computer on a virtual hardware., and . PARLE, volume 694 of Lecture Notes in Computer Science, page 610-621. Springer, (1993)3-D NoC on Inductive Wireless Interconnect., , , and . 3D Integration for NoC-based SoC Architectures, Springer, (2011)A Scalable 3D Heterogeneous Multicore with an Inductive ThruChip Interface., , , , , , , , , and 1 other author(s). IEEE Micro, 33 (6): 6-15 (2013)A Scalable Body Bias Optimization Method Toward Low-Power CGRAs., , , and . IEEE Micro, 43 (1): 49-57 (2023)A prototype chip of multicontext FPGA with DRAM for virtual hardware., , and . ASP-DAC, page 17-18. ACM, (2001)An LSI implementation of the simple serial synchronized multistage interconnection network., , and . ASP-DAC, page 673-674. IEEE, (1997)Power reduction techniques for Dynamically Reconfigurable Processor Arrays., , , , , , , and . FPL, page 305-310. IEEE, (2008)Variable pipeline structure for Coarse Grained Reconfigurable Array CMA., , , and . FPT, page 217-220. IEEE, (2016)Overwrite Configuration Technique in Multicast Configuration Scheme for Dynamically Reconfigurable Processor Arrays., , , , , , and . FPT, page 273-276. IEEE, (2007)