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A 56-Gb/s PAM4 Receiver With Low-Overhead Techniques for Threshold and Edge-Based DFE FIR- and IIR-Tap Adaptation in 65-nm CMOS.

A. Roshan-Zamir, T. Iwai, Y. Fan, A. Kumar, H. Yang, L. Sledjeski, J. Hamilton, S. Chandramouli, A. Aude, and S. Palermo. IEEE J. Solid State Circuits, 54 (3): 672-684 (2019)

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Aude Develay

Aude Jacquot

Frank Arloth

Viktor Arlosoroff

Kathrin Audehm

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A 56 Gb/s PAM4 receiver with low-overhead threshold and edge-based DFE FIR and IIR-tap adaptation in 65nm CMOS.A. Roshan-Zamir, T. Iwai, Y. Fan, A. Kumar, H. Yang, L. Sledjeski, J. Hamilton, S. Chandramouli, A. Aude, and S. Palermo. CICC, page 1-4. IEEE, (2018)A 56-Gb/s PAM4 Receiver With Low-Overhead Techniques for Threshold and Edge-Based DFE FIR- and IIR-Tap Adaptation in 65-nm CMOS.A. Roshan-Zamir, T. Iwai, Y. Fan, A. Kumar, H. Yang, L. Sledjeski, J. Hamilton, S. Chandramouli, A. Aude, and S. Palermo. IEEE J. Solid State Circuits, 54 (3): 672-684 (2019)A 69-mW 10-bit 80-MSample/s Pipelined CMOS ADC.B. Min, P. Kim, F. III, D. Boisvert, and A. Aude. IEEE J. Solid State Circuits, 38 (12): 2031-2039 (2003)

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Disambiguation of "Aude, Arlo"

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A 56-Gb/s PAM4 Receiver With Low-Overhead Techniques for Threshold and Edge-Based DFE FIR- and IIR-Tap Adaptation in 65-nm CMOS.

Please choose a person to relate this publication to

Aude Develay

Aude Jacquot

Frank Arloth

Viktor Arlosoroff

Kathrin Audehm

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Aude, Arlo"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML A 56-Gb/s PAM4 Receiver With Low-Overhead Techniques for Threshold and Edge-Based DFE FIR- and IIR-Tap Adaptation in 65-nm CMOS.

Please choose a person to relate this publication to

Aude Develay

Aude Jacquot

Frank Arloth

Viktor Arlosoroff

Kathrin Audehm

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

A 56-Gb/s PAM4 Receiver With Low-Overhead Techniques for Threshold and Edge-Based DFE FIR- and IIR-Tap Adaptation in 65-nm CMOS.