( en | de | ru )

 

Disambiguation of "Takagi, Naofumi"

Author of the publication

copydeleteadd this publication to your clipboard
A C-Testable 4-2 Adder Tree for an Easily Testable High-Speed Multiplier.

, , and . IEICE Trans. Inf. Syst., 93-D (10): 2783-2791 (2010)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Tsuyoshi Takagi

Mariko Takagi

 

Other publications of authors with the same name

A fast addition algorithm for elliptic curve arithmetic in GF(2n) using projective coordinates., and . Inf. Process. Lett., 76 (3): 101-103 (2000)Dividers., and . The VLSI Handbook, CRC Press, (1999)Design and High-Speed Demonstration of Single-Flux-Quantum Bit-Serial Floating-Point Multipliers Using a 10kA/cm2 Nb Process., , , , , , and . IEICE Trans. Electron., 97-C (3): 188-193 (2014)High-Throughput Rapid Single-Flux-Quantum Circuit Implementations for Exponential and Logarithm Computation Using the Radix-2 Signed-Digit Representation., , and . IEICE Trans. Electron., 99-C (6): 703-709 (2016)A Reconfigurable Data-Path Accelerator Based on Single Flux Quantum Circuits., , , , , , , and . IEICE Trans. Electron., 97-C (3): 141-148 (2014)A Hardware Algorithm for Integer Division Using the SD2 Representation., , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 89-A (10): 2874-2881 (2006)A Hardware Algorithm for Modular Multiplication/Division Based on the Extended Euclidean Algorithm., and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 88-A (12): 3610-3617 (2005)A Fast Algorithm for Multiplicative Inversion in GF(2m) Using Normal Basis., , and . IEEE Trans. Computers, 50 (5): 394-398 (2001)High-Speed VLSI Multiplication Algorithm with a Redundant Binary Addition Tree., , and . IEEE Trans. Computers, 34 (9): 789-796 (1985)Modular Multiplication Hardware Algorithms with a Redundant Representation and Their Application to RSA Cryptosystem., and . IEEE Trans. Computers, 41 (7): 887-891 (1992)