Author of the publication

Characterizing and evaluating a key-value store application on heterogeneous CPU-GPU systems.

, , , , and . ISPASS, page 88-98. IEEE Computer Society, (2012)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Enabling Efficient Dynamic Resizing of Large DRAM Caches via A Hardware Consistent Hashing Mechanism., , , , , , , , and . CoRR, (2016)Open Standard Content Cookies: Utility vs. Privacy., , , and . WebNet, AACE, (1997)GPUDet: a deterministic GPU architecture., , , , and . ASPLOS, page 1-12. ACM, (2013)Reducing Data Transfer Energy by Exploiting Similarity within a Data Transaction., , and . HPCA, page 40-51. IEEE Computer Society, (2018)Characterizing and Mitigating Soft Errors in GPU DRAM., , , , , , , , and . MICRO, page 641-653. ACM, (2021)A Mostly-Clean DRAM Cache for Effective Hit Speculation and Self-Balancing Dispatch., , , , and . MICRO, page 247-257. IEEE Computer Society, (2012)What Your DRAM Power Models Are Not Telling You: Lessons from a Detailed Experimental Study., , , , , , , , , and 2 other author(s). SIGMETRICS (Abstracts), page 110. ACM, (2018)Learning your limit: managing massively multithreaded caches through scheduling., , and . Commun. ACM, 57 (12): 91-98 (2014)Cache-Conscious Wavefront Scheduling., , and . MICRO, page 72-83. IEEE Computer Society, (2012)Accelerated processing and the Fusion System Architecture.. ASP-DAC, page 93. IEEE, (2012)