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Dynamic voltage and frequency scaling for neuromorphic many-core systems., , , , , , , , , and 9 other author(s). ISCAS, page 1-4. IEEE, (2017)Efficient Reward-Based Structural Plasticity on a SpiNNaker 2 Prototype., , , , , , , , , and . CoRR, (2019)Dynamic Power Management for Neuromorphic Many-Core Systems., , , , , , , , , and 5 other author(s). IEEE Trans. Circuits Syst. I Regul. Pap., 66-I (8): 2973-2986 (2019)True random number generation from bang-bang ADPLL jitter., , , and . NORCAS, page 1-5. IEEE, (2016)The SpiNNaker 2 Processing Element Architecture for Hybrid Digital Neuromorphic Computing., , , , , , , , , and 8 other author(s). CoRR, (2021)Hardware Implementation of an OPC UA Server for Industrial Field Devices., , , , , , , , , and 6 other author(s). CoRR, (2021)Live demonstration: Dynamic voltage and frequency scaling for neuromorphic many-core systems., , , , , , , , , and 10 other author(s). ISCAS, page 1. IEEE, (2017)