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On Coding Techniques for Targeting FPGAs via OpenCL., , and . PARCO, volume 32 of Advances in Parallel Computing, page 652-663. IOS Press, (2017)AutoPar-Clava: An Automatic Parallelization source-to-source tool for C code applications., , , and . PARMA-DITAM@HiPEAC, page 13-19. ACM, (2018)Dynamic Partial Reconfiguration of Customized Single-Row Accelerators., , and . IEEE Trans. Very Large Scale Integr. Syst., 27 (1): 116-125 (2019)Code Transformations for Embedded Reconfigurable Computing Architectures., and . GTTSE, volume 6491 of Lecture Notes in Computer Science, page 322-344. Springer, (2009)A Reconfigurable Architecture for Binary Acceleration of Loops with Memory Accesses., , and . ACM Trans. Reconfigurable Technol. Syst., 7 (4): 29:1-29:20 (2015)Transparent Trace-Based Binary Acceleration for Reconfigurable HW/SW Systems., , , and . IEEE Trans. Ind. Informatics, 9 (3): 1625-1634 (2013)C and OpenCL generation from MATLAB., , and . SAC, page 1315-1320. ACM, (2015)ARCHITECT-R: A System for Reconfigurable Robots Design., , , , , , and . SAC, page 679-683. ACM, (2003)Graph-Based Code Restructuring Targeting HLS for FPGAs., and . ARC, volume 11444 of Lecture Notes in Computer Science, page 230-244. Springer, (2019)Context Inference for Mobile Applications in the UPCASE Project., , , , , and . MOBILWARE, volume 7 of Lecture Notes of the Institute for Computer Sciences, Social Informatics and Telecommunications Engineering, page 352-365. Springer, (2009)