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Disambiguation of "Manna, Kanchan"

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Thermal-Aware Preemptive Test Scheduling for Network-on-Chip Based 3D ICs.

, , , and . ISVLSI, page 529-534. IEEE Computer Society, (2016)

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Carlo Manna

Enzo Manna

Kanchan Anand

Stefano Manna

Kanchan Tolani

 

Other publications of authors with the same name

TSV Placement and Core Mapping for 3D Mesh Based Network-on-Chip Design Using Extended Kernighan-Lin Partitioning., , , and . ISVLSI, page 392-397. IEEE Computer Society, (2015)Mesh-of-Tree Based Scalable Network-on-Chip Architecture., , , and . ICIIS, page 1-6. IEEE, (2008)Congestion-Aware Vertical Link Placement and Application Mapping Onto 3-D Network-on-Chip Architectures., , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 43 (8): 2249-2262 (August 2024)Preemptive Test Scheduling for Network-on-Chip Using Particle Swarm Optimization., , , and . VDAT, volume 382 of Communications in Computer and Information Science, page 74-82. Springer, (2013)A Comparative Performance Evaluation of Network-on-Chip Architectures under Self-Similar Traffic., , , , , and . ARTCom, page 414-418. IEEE Computer Society, (2009)A spare router based reliable Network-on-Chip design., , and . ISCAS, page 1957-1960. IEEE, (2014)A Novel Technique to Reduce both Leakage and Peak Power during Scan Testing., , and . ICIIS, page 1-6. IEEE, (2008)Through silicon via placement and mapping strategy for 3D mesh based Network-on-Chip., , and . VLSI-SoC, page 1-6. IEEE, (2014)A Constructive Heuristic for Application Mapping onto Mesh Based Network-on-Chip., , , and . J. Circuits Syst. Comput., 24 (8): 1550126:1-1550126:29 (2015)Thermal-Aware Preemptive Test Scheduling for Network-on-Chip Based 3D ICs., , , and . ISVLSI, page 529-534. IEEE Computer Society, (2016)