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Disambiguation of "Bertacco, Valeria"

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Morpheus: A Vulnerability-Tolerant Secure Architecture Based on Ensembles of Moving Target Defenses with Churn.

, , , , , , , , , , , , and . ASPLOS, page 469-484. ACM, (2019)

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Valeria Merlo

Valeria Sordi

Valeria Mospanova

Valeria Malieva

Valeria Tano

 

Other publications of authors with the same name

ArChiVED: Architectural checking via event digests for high performance validation., , , , and . DATE, page 1-6. European Design and Automation Association, (2014)Machine learning-based anomaly detection for post-silicon bug diagnosis., , , and . DATE, page 491-496. EDA Consortium San Jose, CA, USA / ACM DL, (2013)SAGA: SystemC acceleration on GPU architectures., , , and . DAC, page 115-120. ACM, (2012)Depth-driven verification of simultaneous interfaces., , and . ASP-DAC, page 442-447. IEEE, (2006)Post-silicon debugging for multi-core designs.. ASP-DAC, page 255-258. IEEE, (2010)Microarchitectural power modeling techniques for deep sub-micron microprocessors., , , , and . ISLPED, page 212-217. ACM, (2004)Scalable Hardware Verification with Symbolic Simulation.. Springer, (2006)Using Field-Repairable Control Logic to Correct Design Errors in Microprocessors., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 27 (2): 380-393 (2008)PowerRanger: Assessing circuit vulnerability to power attacks using SAT-based static analysis., and . HLDVT, page 54-59. IEEE Computer Society, (2009)STACCATO: disjoint support decompositions from BDDs through symbolic kernels., and . ASP-DAC, page 276-279. ACM Press, (2005)