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Disambiguation of "Pileggi, Lawrence T."

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Moment-sensitivity-based wire sizing for skew reduction in on-chip clock nets.

, , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 16 (2): 210-215 (1997)

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Lawrence Oshinowo

Lawrence Phillips

Lawrence Lowe

Lawrence Mutwol

Peter Lawrence

 

Other publications of authors with the same name

A Sparse Image Method for BEM Capacitance Extraction., , , and . DAC, page 357-362. ACM Press, (1996)PRIMO: Probability Interpretation of Moments for Delay Calculation., and . DAC, page 463-468. ACM Press, (1998)Routing architecture exploration for regular fabrics., , and . DAC, page 204-207. ACM, (2004)Electromagnetic parasitic extraction via a multipole method with hierarchical refinement., and . ICCAD, page 437-444. IEEE Computer Society, (1999)Practical considerations for passive reduction of RLC circuits., , and . ICCAD, page 214-220. IEEE Computer Society, (1999)A simple algorithm for calculating frequency-dependent inductance bounds., and . CICC, page 199-202. IEEE, (1998)Regular logic fabrics for a via patterned gate array (VPGA)., , , , and . CICC, page 53-56. IEEE, (2003)Shedding Light on Inconsistencies in Grid Cybersecurity: Disconnects and Recommendations., , , , , , and . SP, page 38-55. IEEE, (2023)Equipotential shells for efficient inductance extraction., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 20 (1): 70-79 (2001)Moment-sensitivity-based wire sizing for skew reduction in on-chip clock nets., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 16 (2): 210-215 (1997)