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A 12-bit hybrid DAC with 8GS/s unrolled pipeline delta-sigma modulator achieving >75dB SFDR over 500MHz in 65nm CMOS.

, , , and . VLSIC, page 1-2. IEEE, (2014)

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A 12-bit hybrid DAC with 8GS/s unrolled pipeline delta-sigma modulator achieving >75dB SFDR over 500MHz in 65nm CMOS., , , and . VLSIC, page 1-2. IEEE, (2014)A cost-efficient fully synthesizable stochastic time-to-digital converter design based on integral nonlinearity scrambling., , and . DAC, page 1021-1026. ACM, (2022)Circuit Connectivity Inspired Neural Network for Analog Mixed-Signal Functional Modeling., , , , , and . DAC, page 505-510. IEEE, (2021)10.2 A SAW-Less Direct-Digital RF Modulator with Tri-Level Time-Approximation Filter and Reconfigurable Dual-Band Delta-Sigma Modulation., and . ISSCC, page 174-176. IEEE, (2020)A 12 bit 1 GS/s Dual-Rate Hybrid DAC With an 8 GS/s Unrolled Pipeline Delta-Sigma Modulator Achieving > 75 dB SFDR Over the Nyquist Band., , , and . IEEE J. Solid State Circuits, 50 (4): 896-907 (2015)Analog Kalman Filter with Integration and Digitization via a Shared Thyristor-Based VCO for Sensor Fusion in 65 nm CMOS., , , , , , , , , and 2 other author(s). ESSCIRC, page 213-216. IEEE, (2023)TAFA: Design Automation of Analog Mixed-Signal FIR Filters Using Time Approximation Architecture., , , , , and . ASP-DAC, page 526-531. IEEE, (2022)From Specification to Silicon: Towards Analog/Mixed-Signal Design Automation using Surrogate NN Models with Transfer Learning., , , , , , , , , and 5 other author(s). ICCAD, page 1-9. IEEE, (2021)A 2GS/s 8.5-Bit Time-Based ADC using a Segmented Stochastic Flash TDC., , and . CICC, page 1-2. IEEE, (2023)A 1-5GHz Direct-Digital RF Modulator with an Embedded Time-Approximation Filter Achieving -43dB EVM at 1024 QAM., and . VLSI Circuits, page 20-. IEEE, (2019)