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Mapping multiple applications with unbounded and bounded number of cores on many-core networks-on-chip.

, , , and . Microprocess. Microsystems, 37 (4-5): 460-471 (2013)

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EM Side-Channel Countermeasure for Switched-Capacitor DC-DC Converters Based on Amplitude Modulation., , , , , and . IEEE Trans. Very Large Scale Integr. Syst., 29 (6): 1061-1072 (2021)Accelerating Image Processing Using Reduced Precision Calculation Convolution Engines., , , , , and . J. Signal Process. Syst., 95 (9): 1115-1126 (September 2023)Design and management of image processing pipelines within CPS: 2 years of experience from the FitOptiVis ECSEL Project., , , , , , , , , and 10 other author(s). DSD, page 378-385. IEEE, (2020)Mapping multiple applications with unbounded and bounded number of cores on many-core networks-on-chip., , , and . Microprocess. Microsystems, 37 (4-5): 460-471 (2013)FPGA Prototype of the REALJava Co-Processor., , and . SoC, page 1-4. IEEE, (2007)Heap access optimizations for a hardware-accelerated Java virtual machine., , and . SoC, page 125-128. IEEE, (2010)A novel hardware acceleration scheme for java method calls., , and . ISCAS, page 1676-1679. IEEE, (2008)t(k)-SA: accelerated simulated annealing algorithm for application mapping on networks-on-chip., , , and . GECCO, page 1191-1198. ACM, (2012)Modified SRCMOS cell for high-throughput wave-pipelined arithmetic units., and . ISCAS (4), page 194-197. IEEE, (2001)Design and management of image processing pipelines within CPS: Acquired experience towards the end of the FitOptiVis ECSEL Project., , , , , , , , , and 17 other author(s). Microprocess. Microsystems, (November 2021)