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Exploration of Distributed Shared Memory Architectures for NoC-based Multiprocessors.

, , , and . ICSAMOS, page 144-151. IEEE, (2006)

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Multi-objective design space exploration of embedded systems., , and . J. Embed. Comput., 1 (3): 305-316 (2005)DeSpErate++: An Enhanced Design Space Exploration Framework Using Predictive Simulation Scheduling., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 34 (2): 293-306 (2015)Voltage island management in near threshold manycore architectures to mitigate dark silicon., , , and . DATE, page 1-6. European Design and Automation Association, (2014)Guest Editorial: Special Issue on Computing Frontiers., , , and . Int. J. Parallel Program., 46 (2): 333-335 (2018)Two-levels of adaptive buffer for virtual channel router in NoCs., , , , , and . VLSI-SoC, page 302-307. IEEE, (2011)Emulating Transactional Memory on FPGA Multiprocessors., , , , and . ARCS, volume 6566 of Lecture Notes in Computer Science, page 74-85. Springer, (2011)mARGOt: A Dynamic Autotuning Framework for Self-Aware Approximate Computing., , , and . IEEE Trans. Computers, 68 (5): 713-728 (2019)Floorplan-aware hierarchical NoC topology with GALS interfaces., , , , , , and . ISCAS, page 652-655. IEEE, (2012)An efficient design space exploration methodology for multiprocessor SoC architectures based on response surface methods., , and . ICSAMOS, page 150-157. IEEE, (2008)An industrial design space exploration framework for supporting run-time resource management on multi-core systems., , , , , , and . DATE, page 196-201. IEEE Computer Society, (2010)