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Disambiguation of "Anderson, Jason Helge"

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FPGA Architecture Enhancements for Efficient BNN Implementation.

, , and . FPT, page 214-221. IEEE, (2018)

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Ian Jason

Hans Helge

Alexandra Helgert

Roland Helger

Thomas Helge

 

Other publications of authors with the same name

Clock gating architectures for FPGA power reduction., , and . FPL, page 112-118. IEEE, (2009)Design re-use for compile time reduction in FPGA high-level synthesis flows., and . FPT, page 4-11. IEEE, (2014)Generic Connectivity-Based CGRA Mapping via Integer Linear Programming., and . FCCM, page 65-73. IEEE, (2019)An LPGA with Foldable PLA-style Logic Blocks., and . FPGA, page 244-252. ACM, (1998)Architecture Exploration of Standard-Cell and FPGA-Overlay CGRAs Using the Open-Source CGRA-ME Framework., , , , , , and . ISPD, page 48-55. ACM, (2018)LegUp: high-level synthesis for FPGA-based processor/accelerator systems., , , , , , , and . FPGA, page 33-36. ACM, (2011)Towards interconnect-adaptive packing for FPGAs., , and . FPGA, page 21-30. ACM, (2014)FPGA power reduction by guarded evaluation., and . FPGA, page 157-166. ACM, (2010)Optimizing FPGA Logic Block Architectures for Arithmetic., , , , , , , , , and 2 other author(s). IEEE Trans. Very Large Scale Integr. Syst., 28 (6): 1378-1391 (2020)Efficient Memory Arbitration in High-Level Synthesis From Multi-Threaded Code., , , , , and . IEEE Trans. Computers, 71 (4): 933-946 (2022)