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Detection of Delay Faults in Memory Address Decoders.. J. Electron. Test., 16 (4): 381-387 (2000)Built-in self-test for folded bit-line Mbit DRAMs.. Integr., 21 (1-2): 95-112 (1996)Constructing Augmented Multimode Compactors.. VTS, стр. 29-34. IEEE Computer Society, (2008)Fully X-tolerant, very high scan compression., , , и . DAC, стр. 362-367. ACM, (2010)Constructing augmented time compactors.. European Test Symposium, стр. 151-156. IEEE Computer Society, (2010)A class of sequential circuits with combinational test generation complexity under single-fault assumption., , и . Asian Test Symposium, стр. 398-403. IEEE Computer Society, (2000)SPIRIT: A Highly Robust Combinational Test Generation Algorithm., и . VTS, стр. 346-351. IEEE Computer Society, (2001)Understanding Yield Losses in Logic Circuits., , , , , и . IEEE Des. Test Comput., 21 (3): 208-215 (2004)Two-Step Dynamic Encoding for Linear Decompressors.. ATS, стр. 330-335. IEEE Computer Society, (2014)Yield Analysis of Logic Circuits., , , , , и . VTS, стр. 103-108. IEEE Computer Society, (2004)