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Disambiguation of "Rau, B. Ramakrishna"

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Predictability of load/store instruction latencies.

, , , , and . MICRO, page 139-152. ACM / IEEE Computer Society, (1993)

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Edukulla Ramakrishna

Ramakrishna Mukkamala

Ramakrishna Upadrasta

Nishtala Ramakrishna Paramahansa

Ramakrishna Rao Vangala

 

Other publications of authors with the same name

Levels of representation of programs and the architecture of universal host machines.. MICRO, page 67-79. ACM, (1978)Sentinel Scheduling for VLIW and Superscalar Processors., , , , , , and . ACM Trans. Comput. Syst., 11 (4): 376-408 (1993)preliminary version: ASPLOS 1992: 238-247.The era of embedded computing.. CASES, page 119. ACM, (2000)EPIC: Explicititly Parallel Instruction Computing., and . Computer, 33 (2): 37-45 (2000)Register Allocation for Software Pipelined Loops., , , and . PLDI, page 283-299. ACM, (1992)Reverse If-Conversion., , , and . PLDI, page 290-299. ACM, (1993)Systematically derived instruction sets for high-level language support., , and . ACM Southeast Regional Conference, page 73-84. ACM, (1982)Sentinel Scheduling for VLIW and Superscalar Processors., , , , and . ASPLOS, page 238-247. ACM Press, (1992)long version: TOCS 11(4): 376-408.A Constructive Solution to the Juggling Problem in Processor Array Synthesis., , , and . IPDPS, page 815-822. IEEE Computer Society, (2000)Cydra 5 Directed Dataflow Architecture.. COMPCON, page 106-113. IEEE Computer Society, (1988)