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Duality cache for data parallel acceleration., , and . ISCA, page 397-410. ACM, (2019)SeedEx: A Genome Sequencing Accelerator for Optimal Alignments in Subminimal Space., , , , , , and . MICRO, page 937-950. IEEE, (2020)Multi-Layer In-Memory Processing., , , and . MICRO, page 920-936. IEEE, (2022)HALO-CAT: A Hidden Network Processor with Activation-Localized CIM Architecture and Layer-Penetrative Tiling., , , , and . CoRR, (2023)AxNoC: Low-power Approximate Network-on-Chips using Critical-Path Isolation., , , , and . NOCS, page 6:1-6:8. IEEE, (2018)In-/Near-Memory Computing, , , and . Synthesis Lectures on Computer Architecture Morgan & Claypool Publishers, (2021)In-memory Data Flow Processor., , and . PACT, page 375. IEEE Computer Society, (2017)A 2.46M Reads/s Seed-Extension Accelerator for Next-Generation Sequencing Using a String-Independent PE Array., , , , , , , , , and 1 other author(s). IEEE J. Solid State Circuits, 56 (3): 824-833 (2021)MVC: Enabling Fully Coherent Multi-Data-Views through the Memory Hierarchy with Processing in Memory.. MICRO, page 800-814. ACM, (2023)Vector-Processing for Mobile Devices: Benchmark and Analysis., , , , and . IISWC, page 15-27. IEEE, (2023)