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Accelerator Memory Reuse in the Dark Silicon Era., , , , and . IEEE Comput. Archit. Lett., 13 (1): 9-12 (2014)CRYLOGGER: Detecting Crypto Misuses Dynamically., , , and . CoRR, (2020)Agile SoC Development with Open ESP., , , , , , , , and . CoRR, (2020)Design Automation of Electronic Systems: Past Accomplishments and Challenges Ahead Scanning the Issue., , , and . Proc. IEEE, 103 (11): 1952-1957 (2015)Silicon Photonics Codesign for Deep Learning., , , , , and . Proc. IEEE, 108 (8): 1261-1282 (2020)NoC-Based Support of Heterogeneous Cache-Coherence Models for Accelerators., , and . NOCS, page 1:1-1:8. IEEE, (2018)Broadening the exploration of the accelerator design space in embedded scalable platforms., , , and . HPEC, page 1-7. IEEE, (2017)Exploiting Private Local Memories to Reduce the Opportunity Cost of Accelerator Integration., , and . ICS, page 27:1-27:12. ACM, (2016)Flexible filters: load balancing through backpressure for stream programs., and . EMSOFT, page 205-214. ACM, (2009)Topology-Based Optimization of Maximal Sustainable Throughput in a Latency-Insensitive System., and . DAC, page 410-415. IEEE, (2007)