Author of the publication

Design of built-in test generator circuits using width compression.

, and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 17 (10): 1044-1051 (1998)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Test Propagation Through Modules and Circuits., and . ITC, page 748-757. IEEE Computer Society, (1991)Online BIST for Embedded Systems., , and . IEEE Des. Test Comput., 15 (4): 17-24 (1998)Scalable Test Generators for High-Speed Datapath Circuits., , and . J. Electron. Test., 12 (1-2): 111-125 (1998)Huffman encoding of test sets for sequential circuits., , and . IEEE Trans. Instrum. Meas., 47 (1): 21-25 (1998)Deterministic built-in test pattern generation for high-performance circuits using twisted-ring counters., , and . IEEE Trans. Very Large Scale Integr. Syst., 8 (5): 633-636 (2000)Codesign of architectures for automotive powertrain modules., , , and . IEEE Micro, 14 (4): 17-25 (1994)Design of built-in test generator circuits using width compression., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 17 (10): 1044-1051 (1998)Hierarchical testing using precomputed tests for modules.. University of Michigan, USA, (1994)Optimal Space Compaction of Test Responses., , and . ITC, page 834-843. IEEE Computer Society, (1995)Test Width Compression for Built-In Self Testing., , , and . ITC, page 328-337. IEEE Computer Society, (1997)