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Write Termination Circuits for RRAM: A Holistic Approach From Technology to Application Considerations., , , , , , , , , и . IEEE Access, (2020)A Memristor-Based Bayesian Machine., , , , , , , , , и . CoRR, (2021)Digital Biologically Plausible Implementation of Binarized Neural Networks with Differential Hafnium Oxide Resistive Memory Arrays., , , , , , , и . CoRR, (2019)RRAM-based FPGA for "Normally Off, Instantly On" applications., , , , , , , и . J. Parallel Distributed Comput., 74 (6): 2441-2451 (2014)Design and analysis of crossbar architecture based on complementary resistive switching non-volatile memory cells., , , , , , , , , и 4 other автор(ы). J. Parallel Distributed Comput., 74 (6): 2484-2496 (2014)A Discussion on Test Pattern Generation for FPGA - Implemented Circuits., , , , и . J. Electron. Test., 17 (3-4): 283-290 (2001)An Approach to Minimize the Test Configuration for the Logic Cells of the Xilinx XC4000 FPGAs Family., , , и . J. Electron. Test., 16 (3): 289-299 (2000)Computational SRAM Design Automation using Pushed-Rule Bitcells for Energy-Efficient Vector Processing., , , , , , , и . DATE, стр. 1187-1192. IEEE, (2020)In-Memory Resistive RAM Implementation of Binarized Neural Networks for Medical Applications., , , , , , , и . DATE, стр. 690-695. IEEE, (2020)A Tunneling Model for Gate Oxide Failure in Deep Sub-Micron Technology., , и . DATE, стр. 1404-1405. IEEE Computer Society, (2004)