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Disambiguation of "Lee, Ki Won"

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Area-efficient and reusable VLSI architecture of decision feedback equalizer for QAM modern.

, , , , , , and . ASP-DAC, page 404-408. ACM, (2001)

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Ki-Chan Lee

Dong-Ki Lee

Chul-Won Lee

Jae-Won Lee

Seung-Won Lee

 

Other publications of authors with the same name

A 3.2 Gbps/pin 8 Gbit 1.0 V LPDDR4 SDRAM With Integrated ECC Engine for Sub-1 V DRAM Core Operation., , , , , , , , , and 10 other author(s). IEEE J. Solid State Circuits, 50 (1): 178-190 (2015)DocT - Document management and testing tool for robot software., , and . URAI, page 413-416. IEEE, (2014)SoC R&D Trend for Future Digital Life.. IEICE Trans. Electron., 88-C (8): 1705-1710 (2005)Model reference adaptive synchronization of T-S fuzzy discrete chaotic systems using output tracking control, , , , and . Chaos, Solitons & Fractals, 34 (5): 1590--1598 (December 2007)13.2 A 32Gb 8.0Gb/s/pin DDR5 SDRAM with a Symmetric-Mosaic Architecture in a 5th-Generation 10nm DRAM Process., , , , , , , , , and 27 other author(s). ISSCC, page 234-236. IEEE, (2024)ISP (Information Strategy Planning) for 4S-Based Integration of Spatial Information Systems as Korean Nationwide Project., , , and . EGOV, volume 2739 of Lecture Notes in Computer Science, page 351-354. Springer, (2003)A 1.5-V 3.2 Gb/s/pin Graphic DDR4 SDRAM With Dual-Clock System, Four-Phase Input Strobing, and Low-Jitter Fully Analog DLL., , , , , , , , , and 2 other author(s). IEEE J. Solid State Circuits, 42 (11): 2369-2377 (2007)Low power requirements for future digital life style.. ISLPED, page 1. ACM, (2003)A Reflection and Crosstalk Canceling Continuous-Time Linear Equalizer for High-Speed DDR SDRAM., , , , , , , , , and 13 other author(s). VLSI Circuits, page 1-2. IEEE, (2021)Learning a Structured Graphical Model with Boosted Top-Down Features for Ultrasound Image Segmentation., , , , , , , and . MICCAI (1), volume 8149 of Lecture Notes in Computer Science, page 227-234. Springer, (2013)