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Disambiguation of "Ho, Ron"

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Optical Interconnects for Present and Future High-Performance Computing Systems.

, , , , , and . Hot Interconnects, page 175-177. IEEE Computer Society, (2008)

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Shlomo Ron

Ron Dietrich

Ron Achterrath

Ron Sebastian

Ron Bershan

 

Other publications of authors with the same name

Low-power SRAM design using half-swing pulse-mode techniques., , , , , , , , and . IEEE J. Solid State Circuits, 33 (11): 1659-1671 (1998)A 100+ Meter 12 Gb/s/Lane Copper Cable Link Based on Clock-Forwarding., , , and . IEEE J. Solid State Circuits, 48 (4): 1085-1098 (2013)10-Gbps, 5.3-mW Optical Transmitter and Receiver Circuits in 40-nm CMOS., , , , , , , , , and 2 other author(s). IEEE J. Solid State Circuits, 47 (9): 2049-2067 (2012)Computer Systems Based on Silicon Photonic Interconnects., , , , , , , , and . Proc. IEEE, 97 (7): 1337-1361 (2009)Energy-Efficient Error Control for Tightly Coupled Systems Using Silicon Photonic Interconnects., , , , , , , , and . JOCN, 3 (8): A21-A31 (2011)Optical Interconnect for High-End Computer Systems., , , , , , , , , and 1 other author(s). IEEE Des. Test Comput., 27 (4): 10-19 (2010)Silicon-photonic network architectures for scalable, power-efficient multi-chip systems., , , , , and . ISCA, page 117-128. ACM, (2010)On-chip samplers for test and debug of asynchronous circuits., , , and . ASYNC, page 153-162. IEEE Computer Society, (2007)Robust Energy-Efficient Adder Topologies., , , , and . IEEE Symposium on Computer Arithmetic, page 16-28. IEEE Computer Society, (2007)Digitally-assisted analog circuits for a 10 Gbps, 395 fJ/b optical receiver in 40 nm CMOS., , , , , , , , , and 2 other author(s). A-SSCC, page 29-32. IEEE, (2011)