Author of the publication

Os using TSV-based stacking.

J. Kim, C. Oh, H. Lee, D. Lee, H. Hwang, S. Hwang, B. Na, J. Moon, J. Kim, H. Park, J. Ryu, K. Park, S. Kang, S. Kim, H. Kim, J. Bang, H. Cho, M. Jang, C. Han, J. Lee, K. Kyung, J. Choi, and Y. Jun. ISSCC, page 496-498. IEEE, (2011)

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Joo-Sik Kim

Jun Sik Kim

Dong Sik Kim

Kang-Sik Kim

Hie-Sik Kim

Other publications of authors with the same name

A 512 Mb Two-Channel Mobile DRAM (OneDRAM) With Shared Memory Array.J. Kim, K. Nam, C. Oh, H. Sohn, D. Lee, S. Kim, J. Park, Y. Kim, M. Kim, J. Kim and 5 other author(s). IEEE J. Solid State Circuits, 43 (11): 2381-2389 (2008)Design of a Low-Power and Area-Efficient LDO Regulator Using a Negative-R-Assisted Technique.J. Kim, K. Javed, and J. Roh. IEEE Trans. Circuits Syst. II Express Briefs, 70 (10): 3892-3896 (October 2023)Performance and Durability of Thin Film Thermocouple Array on a Porous Electrode.E. Guk, M. Ranaweera, V. Venkatesan, and J. Kim. Sensors, 16 (9): 1329 (2016)Quantifying the relationship between the power delivery network and architectural policies in a 3D-stacked memory device.M. Shevgoor, J. Kim, N. Chatterjee, R. Balasubramonian, A. Davis, and A. Udipi. MICRO, page 198-209. ACM, (2013)A Current-Mode Four-Phase Synchronous Buck Converter With Dynamic Dead-Time Control.J. Tang, T. Guo, J. Kim, and J. Roh. IEEE Access, (2021)A 1.2 V 12.8 GB/s 2 Gb Mobile Wide-I/O DRAM With 4 × 128 I/Os Using TSV Based Stacking.J. Kim, C. Oh, H. Lee, D. Lee, H. Hwang, S. Hwang, B. Na, J. Moon, J. Kim, H. Park and 12 other author(s). IEEE J. Solid State Circuits, 47 (1): 107-116 (2012)A 1.2V 12.8GB/s 2Gb mobile Wide-I/O DRAM with 4×128 I/Os using TSV-based stacking.J. Kim, C. Oh, H. Lee, D. Lee, H. Hwang, S. Hwang, B. Na, J. Moon, J. Kim, H. Park and 13 other author(s). ISSCC, page 496-498. IEEE, (2011)Silicon etching characteristics for the TMAH based solution with additives.K. Jun, and J. Kim. NEMS, page 507-510. IEEE, (2015)Highly sensitive and stable MOSFET-type hydrogen sensor with dual FETs.B. Kim, and J. Kim. ICST, page 127-130. IEEE, (2013)23.2 A 5Gb/s/pin 8Gb LPDDR4X SDRAM with power-isolated LVSTL and split-die architecture with 2-die ZQ calibration scheme.C. Lee, Y. Eom, J. Park, J. Lee, H. Kim, K. Kim, Y. Choi, H. Chang, J. Kim, J. Bang and 27 other author(s). ISSCC, page 390-391. IEEE, (2017)

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Disambiguation of "Kim, Jung-Sik"

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A 1.2V 12.8GB/s 2Gb mobile Wide-I/O DRAM with 4×128 I/Os using TSV-based stacking.

Please choose a person to relate this publication to

Joo-Sik Kim

Jun Sik Kim

Dong Sik Kim

Kang-Sik Kim

Hie-Sik Kim

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Kim, Jung-Sik"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML A 1.2V 12.8GB/s 2Gb mobile Wide-I/O DRAM with 4×128 I/Os using TSV-based stacking.

Please choose a person to relate this publication to

Joo-Sik Kim

Jun Sik Kim

Dong Sik Kim

Kang-Sik Kim

Hie-Sik Kim

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

A 1.2V 12.8GB/s 2Gb mobile Wide-I/O DRAM with 4×128 I/Os using TSV-based stacking.