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Disambiguation of "Fitzgibbon, Brian"

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A novel implementation of dithered digital delta-sigma modulators via bus-splitting.

, , and . ISCAS, page 1363-1366. IEEE, (2011)

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Rolf-Walter Briant

Benoît Briand

Ursula Brian

Annette Brians

Brian Alexander

 

Other publications of authors with the same name

Calculation of cycle lengths in higher-order MASH DDSMs with constant inputs., and . ICECS, page 479-482. IEEE, (2010)A spur-free MASH digital delta-sigma modulator with higher order shaped dither., , , , , , and . ECCTD, page 723-726. IEEE, (2009)Calculation of cycle lengths in MASH 1-2-2 digital delta sigma modulators with a constant input., , , and . ECCTD, page 627-630. IEEE, (2009)A novel implementation of dithered digital delta-sigma modulators via bus-splitting., , and . ISCAS, page 1363-1366. IEEE, (2011)Observations Concerning the Generation of Spurious Tones in Digital Delta-Sigma Modulators Followed by a Memoryless Nonlinearity., , and . IEEE Trans. Circuits Syst. II Express Briefs, 58-II (11): 714-718 (2011)A Spur-Free MASH DDSM With High-Order Filtered Dither., , and . IEEE Trans. Circuits Syst. II Express Briefs, 58-II (9): 585-589 (2011)Spurious tones in digital delta-sigma modulators resulting from pseudorandom dither., , and . J. Frankl. Inst., 352 (8): 3325-3344 (2015)0.3-4.3 GHz Frequency-Accurate Fractional-N Frequency Synthesizer With Integrated VCO and Nested Mixed-Radix Digital Δ-Σ Modulator-Based Divider Controller., , , , , and . IEEE J. Solid State Circuits, 49 (7): 1595-1605 (2014)Hardware Reduction in Digital Delta-Sigma Modulators via Bus-Splitting and Error Masking - Part II: Non-Constant Input., , and . IEEE Trans. Circuits Syst. I Regul. Pap., 59-I (9): 1980-1991 (2012)Hardware Reduction in Digital Delta-Sigma Modulators Via Bus-Splitting and Error Masking - Part I: Constant Input., , and . IEEE Trans. Circuits Syst. I Regul. Pap., 58-I (9): 2137-2148 (2011)