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Register Bank Assignment for Spatially Partitioned Processors.

, , , and . LCPC, volume 5335 of Lecture Notes in Computer Science, page 64-79. Springer, (2008)

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Memory Systems.. ACM Comput. Surv., 28 (1): 63-65 (1996)Register Bank Assignment for Spatially Partitioned Processors., , , and . LCPC, volume 5335 of Lecture Notes in Computer Science, page 64-79. Springer, (2008)On-Chip Interconnection Networks of the TRIPS Chip., , , , , , and . IEEE Micro, 27 (5): 41-50 (2007)Dark Silicon and the End of Multicore Scaling., , , , and . IEEE Micro, 32 (3): 122-134 (2012)Limited bandwidth to affect processor design., , and . IEEE Micro, 17 (6): 55-62 (1997)Dynamic vectorization in the E2 dynamic multicore architecture., , and . SIGARCH Comput. Archit. News, 38 (4): 27-32 (2010)Errata on "Measuring Experimental Error in Microprocessor Simulation"., , , , , , and . SIGARCH Comput. Archit. News, 30 (1): 2-4 (2002)Billion-Transistor Architectures - Guest Editors' Introduction., and . Computer, 30 (9): 46-49 (1997)A NUCA Substrate for Flexible CMP Cache Sharing., , , , , and . IEEE Trans. Parallel Distributed Syst., 18 (8): 1028-1040 (2007)Multicore Model from Abstract Single Core Inputs., , , , and . IEEE Comput. Archit. Lett., 12 (2): 59-62 (2013)