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Test Strategy for the PowerPC 750 Microprocessor., , and . IEEE Des. Test Comput., 15 (3): 90-97 (1998)An automated method for test model generation from switch level circuits., , , , , , and . ASP-DAC, page 769-774. ACM, (2003)Silicon Symptoms to Solutions: Applying Design for Debug Techniques., , , , , and . ITC, page 664-672. IEEE Computer Society, (2002)Automated Test Model Generation from Switch Level Custom Circuits., , , and . Asian Test Symposium, page 184-189. IEEE Computer Society, (2003)EDIF Test - The Upcoming Standard for Test Data Transfers., and . ITC, page 453-458. IEEE Computer Society, (1992)CAE Functionality for Verification of Diagnostic Programs., and . ITC, page 94-102. IEEE Computer Society, (1989)DFT advances in the Motorola's MPC7400, a PowerPC G4 microprocessor., , , , , , , and . ITC, page 137-146. IEEE Computer Society, (1999)At-Speed Testing of Delay Faults for Motorola's MPC7400, a PowerPC(tm) Microprocessor., , , and . VTS, page 3-8. IEEE Computer Society, (2000)Next-Generation PowerPCTM Microprocessor Test Strategy Improvements., , and . ITC, page 414-423. IEEE Computer Society, (1997)Implementing 1149.1 in the PowerPCTM RISC Microprocessor Family., and . ITC, page 844-850. IEEE Computer Society, (1995)