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Disambiguation of "Hu, Jiang"

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A Customized Graph Neural Network Model for Guiding Analog IC Placement.

, , , , , , , and . ICCAD, page 135:1-135:9. IEEE, (2020)

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Jun Hu

Zaijun Hu

Bing Hu

Hu Wang

Ruguo Hu

 

Other publications of authors with the same name

Statistical clock tree routing for robustness to process variations., , and . ISPD, page 149-156. ACM, (2006)Layout recognition attacks on split manufacturing., , , and . ASP-DAC, page 45-50. ACM, (2019)Low power clock buffer planning methodology in F-D placement for large scale circuit design., , , , , and . ASP-DAC, page 370-375. IEEE, (2008)Zero skew clock routing in X-architecture based on an improved greedy matching algorithm., , , , and . Integr., 41 (3): 426-438 (2008)DUCER: a Fast and Lightweight Error Correction Scheme for In-Vehicle Network Communication., , , and . ICVES, page 1-6. IEEE, (2018)Central Limit Theorem for Mutual Information of Large MIMO Systems With Elliptically Correlated Channels., , and . IEEE Trans. Inf. Theory, 65 (11): 7168-7180 (2019)Boostable Repeater Design for Variation Resilience in VLSI Interconnects., and . IEEE Trans. Very Large Scale Integr. Syst., 21 (9): 1619-1631 (2013)Design of Voltage Overscaled Low-Power Trellis Decoders in Presence of Process Variations., , and . IEEE Trans. Very Large Scale Integr. Syst., 17 (3): 439-443 (2009)Low Power Gated Clock Tree Driven Placement., , , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 91-A (2): 595-603 (2008)A single layer zero skew clock routing in X architecture., , , , and . Sci. China Ser. F Inf. Sci., 52 (8): 1466-1475 (2009)